1. Field of Invention
The invention relates to a highly sensitive defect detection method and, in particular, to a method for detecting bottom defects of a device pattern in semiconductor wafers.
2. Related Art
Semiconductor processes employ complex steps such as deposition, etching, chemical mechanical polishing (CMP), to form devices (e.g. transistors, metal wires, and capacitors) with various kinds of shapes and patterns. However, there may be minute particles or residues left on the surface or bottom of the device pattern in these processes. Such residues or particles are considered as defects in the device pattern and may affect the performance and quality of semiconductor devices.
Therefore, the defect detection of semiconductor devices is an important step in the fabrication. A good defect detection method can find out small defects on the device pattern to ensure the semiconductor product quality and to provide process engineers with faithful data for adjustments.
The conventional defect detection method uses a defect detecting system to project an incident beam at a particular angle on the semiconductor wafer and scan through the whole wafer. When the beam hits a defect on the device pattern, the incident light is scattered. Several detectors are disposed around the device to receive the light reflected by the surface of the device pattern and scattered by the defect. Such a signal is compared with that from the neighboring regions of the same wafer, thereby determining the position and number of defects. For example, FIG. 1 shows a conventional defect detection method. An incident beam 104 is projected on the semiconductor wafer 100. If the device pattern 102 of the wafer 100 does not have any defect on its surface and bottom, a reflected beam 104′ is obtained without any scattered light. If the device pattern 102 of the wafer 100 has a surface defect 110 and/or a bottom defect 110, these defects will scatter the incident beam 104 and produce scattering light 112. Since the incident light 104 is scattered by the defects 110, 108, the intensity of the reflected light 104′ is weakened. Detectors 106 receive the reflected light 104′ and scattered light 112. They further compare the signals with the intensity of the reflected light 104 and scattered light 112 from several neighboring device patterns of the same wafer to determine the defect distribution in the device pattern.
However, the defect 108 on the surface of the device pattern 102 can be directly hit by the incident light, whereas the bottom defect 110 receives less light due to the height and pitch of the pattern. As a result, the intensity of the light scattered from the bottom defect 110 is much weaker than that from the surface defect 108. Therefore, it is harder to detect the bottom defect 108 of the device pattern 102. If one increases the intensity of the incident light 104 for enhancing the intensity of the light scattered from the bottom defect 110 of the device pattern 102, the intensity of the light scattered from the surface defect 108 is also increased. Moreover, the noise intensity is enhanced also. Thus, the signal-to-noise (S/N) ratio is reduced. In the end, it is still very difficult to detect the bottom defects with high sensitivity. The detection result may be even worse than before.
On the other hand, there is a relation between the device resistance and its dimension:R=ρ×1/(h×w).
As the size of the semiconductor device pattern is further reduced while the coefficient of resistance ρ and the length of the device pattern 1 remain the same, one has to increase the height h if the width w is to be reduced so that the resistance R is not increased. We take a metal wire as an example in FIG. 2. When the device pattern size on the wafer 100 shrinks from 0.2 μm in the left plot to 0.1 μm in the right plot, the line width of the metal wire 102 (i.e. the device pattern) changes from w1 of 0.2 μm to w2 of 0.1 μm. The pitch between two device patterns also changes from d1 of 0.2 μm to d2 of 0.1 μm. In this case, due to the narrow pitch, the incident light 104 projected to the pitch d2 of the device pattern 102 is less than the pitch d1. Moreover, using the same material (same coefficient of resistance) and the same length of device pattern, the height of the device pattern 102 increases from h1 to h2 if one wants to obtain the same resistance. Therefore, the aspect ratio h/d increases. As this factor increases, the number of reflections of the incident light 104 in d2 also increases (as indicated by the arrow). However, the light intensity attenuates with the reflections. Therefore, the energy intensity of the incident light 104 reaching the bottom of the pitch d2 is lower than that reaching the bottom of the pitch d1. Accordingly, the intensity of scattering light from the bottom defect of the pitch d2 is lower. It is thus not good for detecting the bottom defects in a device pattern.
Therefore, we need a defect detection method that is not only able to detect defects on the surface of a device pattern, but also sensitive to defects at the bottom of the device pattern.